Toshiba-WD Alliance 3D NAND mass production will use Samsung TCAT process
According to the Impress Watch website, Toshiba announced at the IEDM conference on December 8 that it will use a memory cell structure similar to Samsung TCAT in mass production of 3D NAND flash memory.
Toshiba and Samsung have been leading in the development of 3D NAND technology.
Toshiba has developed the BiCS process, which uses a gate-first method to form via holes by alternately depositing an oxide layer and a polysilicon layer stack, filling ONO and pSi, and then depositing a photoresist. A step is formed by a continuous etching process to form interconnections.
Samsung has developed a gate-last method by alternately depositing oxide and nitride layers to form channels through the layer, filling ONO and pSi, forming a step to etch a through trench, removing the nitride, and deposit Alumina, titanium nitride, and tungsten are etched back, and the tank is finally filled with a dock.
The main difference between the two processes is that BiCS uses the gate-first method of the pSi word line, while TCAT uses the gate-last method of the W word line. The advantage of BiCS is that the process is relatively simple, and the advantage of TCAT is that the resistance is low, which helps improve flash memory performance.
Although Toshiba has been doing BiCS, there have been rumors in the industry that Toshiba cannot make effective BiCS, and the TCAT process is actually used in mass production. Toshiba has not previously responded to the rumor.
And at this IEDM conference, WD indirectly confirmed this statement in a 3D NAND flash technology lecture. The 3D NAND flash technology shown in the lecture uses a storage structure similar to Samsung TCAT, not BiCS structure.
According to semiconductor chip research company TechInsights, Samsung, Hynix, and the Toshiba-WD Alliance currently use TCAT-like memory cell technology to implement 3D NAND flash memory. At present, Hynix has not officially responded to this statement.
Toshiba and Samsung have been leading in the development of 3D NAND technology.
Toshiba has developed the BiCS process, which uses a gate-first method to form via holes by alternately depositing an oxide layer and a polysilicon layer stack, filling ONO and pSi, and then depositing a photoresist. A step is formed by a continuous etching process to form interconnections.
Samsung has developed a gate-last method by alternately depositing oxide and nitride layers to form channels through the layer, filling ONO and pSi, forming a step to etch a through trench, removing the nitride, and deposit Alumina, titanium nitride, and tungsten are etched back, and the tank is finally filled with a dock.
The main difference between the two processes is that BiCS uses the gate-first method of the pSi word line, while TCAT uses the gate-last method of the W word line. The advantage of BiCS is that the process is relatively simple, and the advantage of TCAT is that the resistance is low, which helps improve flash memory performance.
Although Toshiba has been doing BiCS, there have been rumors in the industry that Toshiba cannot make effective BiCS, and the TCAT process is actually used in mass production. Toshiba has not previously responded to the rumor.
And at this IEDM conference, WD indirectly confirmed this statement in a 3D NAND flash technology lecture. The 3D NAND flash technology shown in the lecture uses a storage structure similar to Samsung TCAT, not BiCS structure.
According to semiconductor chip research company TechInsights, Samsung, Hynix, and the Toshiba-WD Alliance currently use TCAT-like memory cell technology to implement 3D NAND flash memory. At present, Hynix has not officially responded to this statement.